The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Substrate processing systems may be used to deposit film on a substrate such as a semiconductor wafer. The substrate processing systems typically include a processing chamber and a substrate support. During film deposition, radicals and precursor gas maybe supplied to the processing chamber.
For example, the processing chamber may include an upper chamber, a lower chamber and a substrate support. A showerhead may be arranged between the upper chamber and the lower chamber. The substrate is arranged on the substrate support in the lower chamber. A plasma gas mixture is supplied to the upper chamber and plasma is struck in the upper chamber. Some of the radicals generated by the plasma flow through the showerhead to the lower chamber. The showerhead filters ions and shields UV light from reaching the lower chamber. A precursor gas mixture is supplied to the lower chamber through the showerhead and reacts with the radicals to deposit film on the substrate.
Typically, the showerhead does not have a thermal control system. However, in some processing systems, a basic thermal control system is used to control a temperature of an outer edge of the showerhead, which is accessible and not under vacuum. The basic thermal control system does not uniformly control temperature across the showerhead due to the heat from the plasma. In other words, the temperature at the center of the showerhead increases. Temperature changes also occur with process changes such as plasma on/off, pressure, flow rate, and/or pedestal temperature. Variations in the temperature of the showerhead adversely impact the uniformity of the deposition process and defect performance.